1. Field of the Invention
This invention relates to an electro-luminescence display (ELD), and more particularly to an electro-luminescence display device that reduces the number of output channels of a data driver.
2. Discussion of the Related Art
Recently, various flat panel display devices have been developed with reduced weight and size that are capable of eliminating the disadvantages associated with cathode ray tubes (CRT). Such flat panel display devices include liquid crystal displays (LCD), field emission displays (FED), plasma display panels (PDP) and electro-luminescence (EL) panels, etc.
An electro-luminescence (EL) display is a self-luminous device in which a phosphorous material emits light by recombination of electrons and holes. The EL display is largely classified into an inorganic EL display device and an organic EL display device, depending upon its material and structure. The EL display has the same advantage as cathode ray tubes (CRT) in that it has a faster response speed than passive-type light-emitting devices such as liquid crystal displays (LCD), which require a separate light source.
FIG. 1 is a sectional view illustrating a general structure of an organic EL device for explaining a light-emitting principle of the EL display device. Referring to FIG. 1, the organic EL display device includes an electron injection layer 4, an electron carrier layer 6, a light-emitting layer 8, a hole carrier layer 10 and a hole injection layer 12 that are sequentially disposed between a cathode 2 and an anode 14. When a voltage is applied between a transparent electrode, that is, the anode 14 and a metal electrode, that is, the cathode 2, then electrons produced from the cathode 2 are injected, via the electron injection layer 4 and the electron carrier layer 6, into the light-emitting layer 8, while holes produced from the anode 14 are injected, via the hole injection layer 12 and the hole carrier layer 10, into the light-emitting layer 8. Thus, the electrons and the holes fed from the electron carrier layer 6 and the hole carrier layer 10, respectively, are collided and recombined at the light-emitting layer 8 to generate light. Then, this light is emitted, via the transparent electrode (i.e., the anode 14), into the exterior to thereby display a picture.
Referring to FIG. 2, a related art EL display device employing such an organic EL device includes an EL display panel 16 having pixel cells PE arranged at areas defined by scan electrode lines SL1 to SLn and data electrode lines DL1 to DLm, a scan driver 18 for driving the scan electrode lines SL1 to SLn, a data driver 20 for driving the data electrode lines DL1 to DLm, and a timing controller 28 for controlling each driving timing of the scan driver 18 and the data driver 20.
Referring to FIG. 3, each PE cell 22 includes a supply voltage line VDD, a light-emitting cell OLED connected between the supply voltage line VDD and a ground voltage line GND, and a light-emitting cell driving circuit 30 for driving the light-emitting cell OLED in response to a driving signal supplied from each of the data electrode lines DL and the gate electrode lines SL.
The light-emitting cell driving circuit 30 includes a driving thin film transistor (TFT) DT connected between the supply voltage line VDD and the light-emitting cell OELD, a switching TFT SW connected to the scan electrode lines SL, the data electrode lines DL and the driving TFT DT, and a storage capacitor Cst connected between a first node N1 positioned between the driving TFT DT and the switching TFT SW and the supply voltage line VDD. Herein, the TFTs are a p-type electron metal-oxide semiconductor field effect transistor (MOSFET). A gate terminal of the driving TFT DT is connected to a drain terminal of the switching TFT SW; a source terminal thereof is connected to the supply voltage line VDD; and a drain terminal thereof is connected to the light-emitting cell OLED. A gate terminal of the switching TFT SW is connected to the scan electrode line SL; a source terminal thereof is connected to the data electrode line DL; and a drain terminal thereof is connected to the gate terminal of the driving TFT DT.
Referring back to FIG. 2, the timing controller 28 generates a data control signal for controlling the data driver 20 and a scan control signal for controlling the scan driver 18 using synchronizing signals supplied from an external system (e.g. a graphic card). Further, the timing controller 28 applies a data signal from the external system to the data driver 20. The scan driver 18 generates a scanning pulse SP in response to the scanning control signal from the timing controller 28, and applies the scanning pulse SP to the scan electrode lines SL1 to SLn to sequentially drive the scan electrode lines SL1 to SLn. The data driver 20 supplies a data voltage to the data electrode lines DL1 to DLm every horizontal period 1H in response to the data control signal from the timing controller 28. In this case, the data driver 20 has DLm output channels 21 that are matched with the data electrode lines DL1 to DLm in an one to one relationship.
In each pixel cell PE of the related art EL display device, when a scanning pulse SP having a low state LOW is inputted to the scan electrode line SL from the scan driver 18, the switching TFT SW is turned on. As the switching TFT SW is turned on, a data voltage supplied from the data driver 20 is applied to the first node N1, via the data electrode line DL and the switching TFT SW, in such a manner to be synchronized with the scanning pulse SP applied to the scan electrode line SL. The data voltage applied to the first node N1 is stored in the storage capacitor Cst. The storage capacitor Cst stores the data voltage from the data electrode line DL during an application time of the scanning pulse SP. Such a storage capacitor Cst holds the stored data voltage during one frame. In other words, the storage capacitor Cst applies the stored data voltage to the driving TFT DT even when the scanning pulse SP is not applied to the scan electrode line SL, to thereby turn on the driving TFT DT until the next frame. Thus, the light-emitting cell OLED is turned on by a voltage difference between the supply voltage line VDD and the ground voltage GND, thereby emitting light in proportion to a current amount applied from the supply voltage line VDD via the driving TFT DT.
In such a related art EL display device, the scan driver 18 is integral to the EL display panel 16 in a row direction, and the output channels 21 of the data driver 20 and the data electrode lines DL1 to DLm form an one-to-one matching in a column direction with respect to each other, as shown in FIG. 2. Because the output channels 21 of the data driver 20 is in an one-to-one relationship with the data electrode lines DL1 to DLm, the number of the output channels 21 of the data driver 20 needs to be the same as the number of the data electrode lines DL1 to DLm.
More specifically, according to the related art EL display device, the number of the signal wirings needs to be three times the resolution of the EL display panel 16 in order to connect the output channels 21 of the data driver 20 to the data electrode lines DL. Thus, as the EL display panel has a higher resolution, which means that the number of the output channels of the data driver increases, it becomes difficult to form an one-to-one connection between the data driver 20 and the data electrode lines DL. Therefore, an EL display device capable of making an easy connection between the data driver 20 and the data electrode lines DL would be beneficial, even when a resolution of the EL display panel 16 becomes higher.